Tampere University has approved the lease agreement and commenced construction planning for its SiPFAB semiconductor pilot line, with physical building work set to begin on May 4, 2026.

The announcement marks a significant milestone in Finland's contribution to European semiconductor self-sufficiency, backed by USD 46.8 million in funding allocated over five years under the EU's Chips Act program.

A Campus Transformed for Semiconductor Research

The pilot line will be housed in the Festia building on the university's Hervanta campus, requiring an extensive renovation of the building's B and C wings alongside the construction of a new extension.

The project is being carried out in cooperation with Suomen yliopistokiinteistöt Oy, the Finnish university properties company. In total, the development will cover approximately 2,800 gross square meters, of which around 1,200 gross square meters will be dedicated to cleanroom space along with associated technical and staff facilities.

The decision to locate SiPFAB in the Festia building followed a series of location studies examining options across the Hervanta campus. University officials said the choice was driven by technical suitability, scalability for future expansion, and its proximity to existing research groups.

SiPFAB Director Tuomas Lahtinen described the Festia site as providing a technically optimal and future-proof base. "It enables close, long-term collaboration with research groups and creates excellent conditions for strengthening industry collaboration and high-level fundamental research," Lahtinen said. The placement within the campus was also noted as supporting the university's broader long-term space utilization strategy for Hervanta.

Construction Phased Across 2026 With April 2027 Completion Target

Construction has been divided into two phases, commencing on May 4 and July 1, 2026, respectively, as different parts of the Festia building become available for the project. The combined construction and commissioning period is estimated at eleven months, with a target completion date of April 1, 2027.

Once the cleanroom facilities are ready, approximately 50 individual pieces of equipment will be installed. These will cover functions including chip packaging, reliability testing, and characterization, and are intended to support the development of new packaging solutions and chip technologies. The university has not yet publicly specified which equipment suppliers will be involved.

EU Chips Act Funding and Finland's Semiconductor Ambitions

SiPFAB is one of the projects operating under the EU Chips Act, a European Union program designed to strengthen the continent's competitiveness and resilience in the semiconductor industry. Tampere University secured USD 46.8 million through the program to implement the pilot line, funding that will be spread across a five-year period.

Tampere University President Keijo Hämäläinen framed the investment as both a national and regional turning point for semiconductor expertise. "SiPFAB will place Tampere University at the heart of Finnish and European semiconductor expertise. This investment enables research and development activities on an entirely new scale and strengthens the vitality of the entire region," he said.

Hämäläinen also pointed to Tampere's existing strengths as justification for the city being the location of such infrastructure. The university, he noted, has accumulated decades of experience in microelectronics research and chip design, with an established ecosystem linking education, research institutions, and companies.

"We have expertise and a tradition of collaboration that does not emerge overnight," he said. "That is why it is excellent that we are now also developing new infrastructure that supports the advancement of the field."

Pilot Line Leadership and Previous Milestones

Tuomas Lahtinen was appointed as Director of the SiPFAB pilot line in March 2025, predating the current construction announcement by over a year. His appointment signaled the university's intent to build dedicated operational leadership for what is a complex, multi-year infrastructure project.

In December 2025, the university published details confirming that the pilot line would incorporate approximately 1,300 square meters of cleanroom space at the Hervanta campus, positioning it at what the institution described as the forefront of European chip expertise. The current announcement revises the cleanroom figure slightly, specifying 1,200 gross square meters, with the overall project footprint confirmed at approximately 2,800 gross square meters.

Regional and Industry Implications

The SiPFAB facility is expected to serve not only the university's internal research agenda but also to function as a platform for industry collaboration. The cleanroom and its equipment will provide companies with access to advanced packaging and testing capabilities that are otherwise scarce in the Nordic region.

Chip packaging has become an increasingly critical area of semiconductor development globally, as the industry encounters physical limits in traditional transistor scaling.

Advanced packaging techniques allow multiple chips to be integrated into a single module, improving performance and energy efficiency. By establishing dedicated packaging infrastructure, Tampere University is positioning itself to contribute to this rapidly evolving segment of the semiconductor supply chain.

The Festia building renovation and extension project is being illustrated by Arkkitehtitoimisto Helamaa and Heiskanen, the architectural firm engaged for the design work.

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